How should I design multiple writers?

I am trying to design a simple system in SystemC. Its just for educational purposes.

Basically, I have a module Random, that generates random numbers, and a module Square, that takes a number and give back its square.

Its ok when I have only 1 object of each module active. But how sould I do it if I have 2 instances of Random trying to use 1 instance of Square?

I was trying to write in Square just 1 port in and 1 port out. But it is not allowed to have a FIFO with multiple writers. Im quite confused on how I should implement this. My current idea (which I feel is not right) is to write my own channel (that will have multiple primitive channels inside) and will work to join all data received from this primitives.

Thanks