I have a design where a producer and a consumer are connected together through a simple packet interface. The consumer thread is just executed once. I did not understand what is wrong with it. Here is the code. The second module is executed once at the beginning of the simulation and is not executed after.
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: cmMac.h :
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#ifndef CM_MAC
#define CM_MAC
SC_MODULE(cmMac) {
sc_in_clk Clk;
sc_in<bool> Rst;
sc_out<long> txDout;
sc_out<bool> txDv;
sc_out<bool> txSof;
sc_out<bool> txEof;
sc_out<char> txMod;
sc_out<bool> txErr;
SC_CTOR(cmMac) {
SC_CTHREAD(cmMacSend, Clk.pos());
//reset_signal_is(Rst, false);
cmMacInit();
}
ifstream inFile;
void cmMacInit();
void cmMacSend();
};
#endif
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: cmDutmodel.h:
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#ifndef CM_DUTMOD
#define CM_DUTMOD
//#include "cm_mem.h"
SC_MODULE(cmDutmodel) {
sc_in<bool> Reset;
sc_in_clk Clk;
sc_in<long> txDin;
sc_in<bool> txDv;
sc_in<bool> txSof;
sc_in<bool> txEof;
sc_in<char> txMod;
sc_in<bool> txErr;
// cmMem<sc_uint<70>,1024> Fifo1;
bool inPkt;
sc_uint<32> wrPtr;
sc_uint<32> rdPtr;
sc_uint<1> wEn;
sc_uint<32> pktSize;
SC_CTOR(cmDutmodel) {
SC_CTHREAD(cmDutmodelRx, Clk.pos());
inPkt = false;
wrPtr = 0;
rdPtr = 0;
//Fifo1.memAddrA(wrPtr);
//Fifo1.memDinA(txSof,txEof,txErr,txMod,txDin);
//Fifo1.memWenbA(wEn);
}
void cmDutmodelRx();
};
#endif