SystemC embedded boost completely incompatible with latest boost?
Hello all, I am finding that SystemC 2.2 cannot harmoniously compile with boost 1.58 when -DSC_INCLUDE_DYNAMIC_PROCESSES is defined. It creates a condition where SystemC's embedded boost declarations...
View ArticleInstalling SystemC by MSYS error
Hi, There is some errors when I compile the library. I really cannot figure out what's they means. Here is the errors during make. make[3]: Entering directory...
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Hierarchical vcd dumps
Hi, I'm new to SystemC, but have worked with Verilator/C++ for quite a while. We are now moving to Verilator/SystemC and have problems creating hierarchical vcd dumps from SystemC native vcd...
View ArticleRead from buffer without removing content
Hi all, I want to be able to read an element from a "buffer-like" data structure without removing it. Is there a systemc structure for that ? sc_fifo "nb_read() and read()" methods removes the...
View ArticleMethod execution order
I'm implementing a network simulator where modules send flits (packets of information) to other modules. They can only do so if there is available space in a buffer to hold a flit. Credits are used to...
View ArticleConnecting modules
Hi, I'm learning SystemC and have a question. I have a bus of signals origin from one module that needs to be split up and routed to several other modules. For example SC_MODULE(A) { sc_out<...
View ArticleFurther help needed with finding port that is not bound
Fairly new to systemc and I get the message "Error (E112) get interface failed: port is not bound: port 'Instance1.SubInstance.port_name' (sc_object) .... I've already named my ports at the top of...
View Articleproblem with tb of fir filter
i was tring to do an online training by fortedesign on youtube and tried to use the same code but after running got nothing, i think the testbench doesn't run at all ? also i got error from eclispe...
View ArticleSystemC licences compatibility
Hi, In the context of a research project we plan to deliver a simulator based on the SystemC standard. To compile and run the simulator, we suggest the users to use the Accellera implementation. We...
View ArticleWhat could cause wait(sc_time, sc_time_unit) to generate runtime error?
Hello, I was doing a simulation and I keep getting a runtime error exception (MSVC). I traced the error to a wait() statement. What could be the cause? Thank you,
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add template class sc_objects to sc_vector with dynamic template arguments
Hi, is it possible to add sc_modules with template arguments to a sc_vector where the template argument is dynamic? What I mean is this: sc_vector<Shift_register_nBit<?, ?>> shift;...
View ArticleMaximum number of SC_MODULE ?
Hi, I have an error at runtime that says "in sc_main (argc = Cannot access memory at address 0x....)" I use system 2.2.0 on a 64 bit linux machine. The problem appears when I try to instanciate...
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PoC simulator runs out of threads when built with --enable-pthreads
When the PoC simulator is built to use pthreads (which, while not the default, is useful since it allows valgrind to work properly on Linux) then some models, that spawn many threads, cause a...
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binding issue
hi, iam new to systemc, i tried programming AND but was felt with port binding issue. could anyone pls tell me where i have gone wrong... and.h #include "systemc.h" SC_MODULE(and) { sc_in<...
View ArticleIssue with bit width for double and float types in VCD tracing
A VCD tracing of a sc_signal<double> generates to following line in the resulting file: $var real 1 aaaaa dbl_s $end The vcd2wlf tool of Mentor now chokes on that (I tested version...
View Articlewhat is always@(*) verilig2001 equivalent syntax in SystemC?
In Verilog 2001 there is syntax always@(*). It considers all inputs used inside process are taken care in sensitivity list. Is there any equivalent syntax in SystemC?
View Articlehow to preserve same posts name when simulating using cadence irun
When systemc design is simulated using cadence irun we can see that modules ports changed to port_0, port_1 etc instead of keeping same port name which are used inside design. How to preserve same port...
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adder - hierarchy- output issue
Hi, i was trying to obtain a fulladder through half adder. i was able to build and run the program but i find that outputs are not as expected. i feel it must be something to do with sensitivity....
View ArticleCompile SystemC 2.3.0/1 dynamically
My project uses SystemC. I am working on a project where entire project tree compiles dynamically. But with latest SystemC (2.3.0/1), dynamic build is not supported. So this becomes bit problematic....
View ArticleNewbie problem: writing to a range of bits of sc_out ports declared as...
I am working as a VHDL developer, and I am evaluating the use of SystemC, mainly focused on writing synthesizable code according some third vendor manuals. I am currently writing SystemC versions of...
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